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| DS1283 DS1283 Watchdog Timekeeper Chip FEATURES PIN ASSIGNMENT INTA X1 X2 NC A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V CC WE INTB(INTB) V BAT * Keeps track of hundredths of seconds, seconds, minutes, hours, days, date of the month, months, and years; valid leap year compersation up to 2100 * Watchdog timer restarts an out-of-control processor * Alarm function provides notice of real time related occurrences RCLR SQW OE INTP CE DQ7 DQ6 DQ5 DQ4 DQ3 * Designed for battery operation * Programmable interrupts and square wave outputs maintain 28-pin JEDEC footprint dress and data bus * All registers are individually addressable via the ad* Accuracy is better than 2 minutes/month at 25C * 50 bytes of user nonvolatile RAM * Optional 28-pin SOIC surface mount package * Low-power CMOS circuitry is maintained on less than 1 A in standby mode DS1283 28-PIN DIP (600 MIL) INTA X1 X2 NC A5 1 2 3 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V CC WE INTB(INTB) VBAT RCLR SQW OE INTP CE DQ7 DQ6 DQ5 DQ4 DQ3 * Optional industrial temperature range -40C to +85C DESCRIPTION The DS1283 Watchdog Timekeeper Chip is a self-contained real time clock, alarm, watchdog timer, and interval timer in a 28-pin JEDEC DIP or 28-pin SOIC surface mount package. The DS1283 is specifically designed to maintain internal operations from a single low voltage supply. In fact, the only two external components required by the DS1283 are a battery and crystal. For a complete description of operating conditions, electrical characteristics, bus timing, and pin descriptions other than X1, X2, VBAT, VCC, RCLR, INTB, and INTP see the DS1286 Watchdog Timekeeper data sheet. 4 5 6 7 8 9 10 11 12 13 14 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND DS1283S 28-PIN SOIC (330 MIL) NOTE: Pin 4 must be left disconnected. ECopyright 1997 by Dallas Semiconductor Corporation. All Rights Reserved. For important information regarding patents and other intellectual property rights, please refer to Dallas Semiconductor data books. 032697 1/5 DS1283 PIN DESCRIPTION PIN # 1 2-3 4 5-10 NAME INTA X1,X2 NC A0-A5 I/O O I - I DESCRIPTION Interrupt Output A (open drain) 32.768 KHz Crystal No Connection Address Inputs: A5=Pin 5; A0=Pin 10 Data Input/Output Data Input/Output Data Input/Output Ground Data Input/Output Data Input/Output Data Input/Output Data Input/Output Data Input/Output Chip Enable Interrupt Output P (open drain) Output Enable Square Wave Output RAM Clear Battery Input Interrupt Output B (open drain) Write Enable VCC Input crystal layout considerations, please consult Application Note 58, "Crystal Considerations with Dallas Real Time Clocks." VBAT, VCC - Inputs for batteries or power supplies between 5.5 and 2.5 volts. The VCC supply voltage should never exceed VBAT + 0.3 volts. The VBAT input is used to maintain all internal functions while the VCC input is used to keep all inputs and outputs functional. Therefore, to keep the device fully functional, VBAT and VCC must be at the same voltage potential. As long as the supply voltages are between 4.5 and 5.5 volts, the timing and the input/output levels are guaranteed. In this mode, the active current drain is 2 mA (CE=VIL) and the standby current drain is 0.5 mA (CE=VIH). Data retention mode occurs when the VBAT supply is between 5.5 and 2.5 volts and the VCC supply is grounded. In the data retention mode the current drain is less than 1 A maximum at 5.5 volts (CE=VBAT-0.2 volts). The current drain specifications are stated with all outputs unloaded. RCLR - The RCLR pin is used to clear (set to logic 1) all 50 bytes of user nonvolatile RAM but does not affect the registers involved with time, alarm, and watchdog functions. In order to clear the RAM, RCLR must be forced to an input logic 0 (-0.3 to +0.8 volts). The RCLR function is designed to be used via human interface (shorting to ground manually or by switch) and not to be driven with external buffers. This pin is internally pulled up and should be left floating when not in use. INTB - Interrupt B on the DS1283 operates identical to interrupt B on the DS1286 except that the sink and source current is limited to 500 A. This pin should be pulled up or down if not used. INTP - Interrupt P on the DS1283 was a missing or no connection pin on the DS1286. This interrupt works in the same manner as INTA as programmed by the IPSW bit. However, INTP is also logically ORed with the MSB of the date register (see Figure 1). This bit is called the INP bit on the DS1283 and is forced to zero on the DS1286. When the INP bit (interrupt P bit) is set to logical one, interrupt P will be held active low. When INP is set to logical zero, INTP is always at the same logic state as INTA. This pin is an open drain capable of sinking 4 mA. 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 DQ0 DQ1 DQ2 GND DQ3 DQ4 DQ5 DQ6 DQ7 CE INTP OE SQW RCLR VBAT INTB (INTB) WE VCC I/O I/O I/O - I/O I/O I/O I/O I/O I O I O I I O I I PIN DESCRIPTIONS X1, X2 - Connections for a standard 32.768 KHz quartz crystal. The internal oscillator circuitry is designed for operation with a crystal having a load capacitance (CL) of 6 pF. The crystal is connected directly to the X1 and X2 pins. There is no need for external capacitors or resistors. For more information on crystal selection and 032697 2/5 DS1283 DS1283 WATCHDOG TIMEKEEPER REGISTERS Figure 1 ADDRESS 0 BIT 7 0.1 SECONDS 0.01 SECONDS BIT 0 RANGE 00-99 1 0 10 SECONDS SECONDS 00-59 2 0 10 MINUTES MINUTES 00-59 3 M 10 MIN ALARM 10 A/P 10 A/P 0 0 0 HR MIN ALARM 00-59 01-12+A/P 4 CLOCK, CALENDAR, TIME OF DAY ALARM REGISTERS 0 12/24 HR HOURS 00-23 01-12+A/P 00-23 5 M 12/24 HR ALARM 6 0 0 DAYS 01-07 THIS BIT IS FORCED TO ZERO ON THE DS1286 7 M 0 0 0 0 DAY ALARM 01-07 8 INP 0 10 DATE DATE 01-31 9 EOSC ESQW 0 10MO MONTHS 01-12 A COMMAND REGISTERS 10 YEARS IBH LO YEARS 00-99 B TE IPSW PU LVL WAM TDM WAF TDF WATCHDOG ALARM REGISTERS (RETRIGGERABLE/ REPETITIVE COUNTDOWN ALARM) USER REGISTERS C 0.1 SECONDS 0.01 SECONDS 00-99 D 10 SECONDS SECONDS 00-99 E 3F 032697 3/5 DS1283 DS1283 28-PIN DIP PKG DIM B A IN. MM B IN. MM 1 C IN. MM A D IN. MM E IN. MM C F IN. MM G IN. MM H IN. MM J IN. MM D K IN. MM 0.600 0.015 0.120 0.090 0.625 0.008 0.015 0.625 0.040 0.145 0.110 0.675 0.012 0.022 28-PIN MIN 1.445 0.530 0.140 MAX 1.470 0.550 0.160 F K G E J H 032697 4/5 DS1283 DS1283 28-PIN SOIC K G PKG DIM A IN. MM B IN. MM C IN. MM D IN. MM E IN. MM F IN. MM C G IN. MM H IN. MM J IN. MM K IN. MM 28-PIN MIN 0.706 17.93 0.338 8.58 0.086 2.18 0.020 0.58 0.002 0.05 0.090 2.29 0.050 1.27 0.460 11.68 0.006 0.15 0.014 0.36 MAX 0.728 18.49 0.350 8.89 0.110 2.79 0.050 1.27 0.014 0.36 0.124 3.15 BSC 0.480 12.19 0.013 0.33 0.020 0.51 E A B F 0-8 deg. typ. J D H 032697 5/5 |
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